Many electronic circuits incorporated in a semiconductor package require an inductor as an electric component part forming the electronic circuit. One of the following methods may be used to incorporate a small inductor into a package substrate of a semiconductor package.
1) Forming a recessed portion in a package substrate and inserting a coil part, which is used as an inductor, into the recessed portion to embed the inductor in the package substrate.
2) Forming a spiral flat pattern by a flat wiring in a package substrate.
3) Forming a three-dimensional rectangular coil structure using via conductors and flat wirings in a package substrate.
According to the above-mentioned method 1), a surface mount chip coil, which is formed as a single part, is embedded in a package substrate. Thus, it is necessary to reserve a space for embedding the chip coil in the package substrate, which results in an increase in the size of the package substrate and miniaturization of the semiconductor package is limited.
According to the above-mentioned method 2), an inductor is formed in a package substrate in a manufacturing process of the package substrate by forming a flat coil using wirings in the package substrate. The package substrate having such a flat coil can be smaller than the package substrate having a chip coil embedded therein. However, because the flat coil on the package substrate is formed by spirally-arranged wirings, the flat coil cannot provide a large inductance.
According to the above-mentioned method 3), an inductor is formed in a package substrate in a manufacturing process of the package substrate by forming a three-dimensional coil using via conductors extending vertically in the package substrate and flat wirings extending horizontally in the package substrate. The three-dimensional coil formed in the package substrate can provide a larger inductance than the flat coil formed by spirally-arranged wirings. However, because a number of processes needed to form the three-dimensional coil is large, a manufacturing cost of the package substrate is increased.
Thus, there is suggested in Japanese Laid-Open Patent Application No. 2007-53311 a technique to form a small chip-type coil structure in which a three-dimensional coil is formed by using a substrate manufacturing technique such as the above-mentioned method (3) and embed the thus-formed chip-type coil structure in a package substrate. That is, a plurality of penetrating conductors are formed in a small-size insulating substrate, and a three-dimensional coil is formed by electrically connecting the penetrating conductors by wirings formed on front and back surfaces of the insulating substrate in order to form a small inductor as a single coil structure.
According to the coil structure disclosed in the above-mentioned patent document, many penetrating conductors such as via conductors must be formed in an insulating substrate. Thus, it is difficult to reduce the size of the coil structure because there is a limitation due to a density of the penetrating conductors, which can be formed in the insulating substrate. In order to adjust an inductance by changing a turn number of the coil, a number of penetrating conductors formed in the insulating substrate must be changed. Accordingly, in order to form a different inductor having a different inductance, a different insulating substrate must be fabricated.
Accordingly, it is desired to develop a technique to form a small-sized inductor structure for which inductance can be easily changed.